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TUNABLE MULTI TIERED STT MRAM CACHE FOR MULTI CORE PROCESSORS

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TUNABLE MULTI TIERED STT MRAM CACHE FOR MULTI CORE PROCESSORS

PCT NATIONAL PHASE APPLICATION

Published

date

Filed on 12 January 2015

Patent Information

Application ID76/MUMNP/2015
Date of Application12/01/2015

Documents

NameDate
76-MUMNP-2015-Correspondence to notify the Controller [07-03-2022(online)].pdf07/03/2022
76-MUMNP-2015-US(14)-HearingNotice-(HearingDate-09-03-2022).pdf15/02/2022
76-MUMNP-2015-ABSTRACT [15-09-2020(online)].pdf15/09/2020
76-MUMNP-2015-CLAIMS [15-09-2020(online)].pdf15/09/2020
76-MUMNP-2015-COMPLETE SPECIFICATION [15-09-2020(online)].pdf15/09/2020
76-MUMNP-2015-FER_SER_REPLY [15-09-2020(online)].pdf15/09/2020
76-MUMNP-2015-OTHERS [15-09-2020(online)].pdf15/09/2020
76-MUMNP-2015-FER.pdf29/06/2020
76-MUMNP-2015-CORRESPONDANCE-(8-05-2015).pdf11/08/2018
76-MUMNP-2015-Correspondence-140115.pdf11/08/2018
76-MUMNP-2015-Correspondence-270515.pdf11/08/2018
76-MUMNP-2015-FORM 3-(8-05-2015).pdf11/08/2018
76-MUMNP-2015-OTHERS-270515.pdf11/08/2018
76-MUMNP-2015-Power of Attorney-140115.pdf11/08/2018
ABSTRACT1.jpg11/08/2018
DRAWINGS.pdf11/08/2018
FORM 3.pdf11/08/2018
FORM 5.pdf11/08/2018
SPECIFICATON.pdf11/08/2018
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