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OPTIMIZING RF PARAMETERS IN NOVEL SI1-XGEX/GAAS JLTFET THROUGH GE MOLE FRACTION VARIATION
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ORDINARY APPLICATION
Published
Filed on 14 November 2024
Abstract
ABSTRACT The present invention provides a hetero-structure JLTFET, which uses Si1-xGex/GaAs as a semiconductor material. As Germanium mole composition (x) decides the behavior of the Si1-xGex/GaAs based JLTFET. So, in this paper, we have investigated the value of ‘x’ for which the reported device will deliver optimum performance.
Patent Information
Application ID | 202411087990 |
Invention Field | POLYMER TECHNOLOGY |
Date of Application | 14/11/2024 |
Publication Number | 48/2024 |
Inventors
Name | Address | Country | Nationality |
---|---|---|---|
Dr. Kaushal Kumar | Department of Electronics and Communication Engineering, Graphic Era Deemed to be University, Dehradun | India | India |
Dr. Ajay Kumar | Department of Electronics and Communication Engineering, Graphic Era Deemed to be University, Dehradun | India | India |
Dr. Aditya Jain | Department of Electronics and Communication Engineering, Graphic Era Deemed to be University, Dehradun | India | India |
Dr. Subhash Chandra Sharma | Department of Electronics and Communication Engineering, Graphic Era Deemed to be University, Dehradun | India | India |
Applicants
Name | Address | Country | Nationality |
---|---|---|---|
GRAPHIC ERA DEEMED TO BE UNIVERSITY | 566/6, Bell Road, Society Area, Clement Town, Dehradun - 248002, Uttarakhand, India | India | India |
Specification
Description:FORM 2
THE PATENTS ACT, 1970
(39 OF 1970)
&
THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
(See section 10; rule 13)
Title: Optimizing RF Parameters in Novel Si1-xGex/GaAs JLTFET through Ge Mole Fraction Variation
APPLICANT DETAILS:
(a) NAME: GRAPHIC ERA DEEMED TO BE UNIVERSITY
(b) NATIONALITY: Indian
(c) ADDRESS: 566/6, Bell Road, Society Area, Clement Town, Dehradun - 248002,
Uttarakhand, India
PREAMBLE TO THE DESCRIPTION:
The following specification particularly describes the nature of this invention and the manner in which it is to be performed.
Optimizing RF Parameters in Novel Si1-xGex/GaAs JLTFET through Ge Mole Fraction Variation
Field of Invention:
The present invention relates to system and method to access the influence of the Germanium mole (x) on the RF parameters of the novel Si1-xGex/GaAs junctionless TFET (JLTFET).
Background of the Invention.
The following background discussion includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication expressly or implicitly referenced is prior art.
To fulfill the demand of the technology, the dimension of the MOSFET is decreasing day by day. This size reduction has benefits in terms of compactness, efficiency, and easy transportation, but on the other side, this reduction has demerits like fabrication complexity, short channel effects (SCSs), drip current, and subthreshold swing (SS) restraint of 60 mV/dec. To overcome these challenges, researchers have inclined their interest to tunnel field effect transistors (TFET).
In TFET, the source and drain are made using the opposite nature of the substrate. Due to this, TFET is less vulnerable to SCEs and RDFs. The other distinction betwixt TFET and MOSFET is their working mechanism. MOSFET supports the emission of charge carriers over the channel when the temperature rises; on the other side, TFET follows the band-to-band tunneling (BTBT) phenomenon. Due to the BTBT mechanism, the SS of TFET can cross the 60 mV/decade limitation of MOSFET, and also it provides low OFF-state current (IOFF). Although TFET has numerous advantages over MOSFET, but it also has some disadvantages. The foremost downsides of TFET are the low ION, ambipolar current, and poorest radio frequency (RF) performance, which occurs due to the BTBT mechanism of TFET. To enhance the ION and suppress IOFF, researchers have suggested so many techniques like band gap engineering, gate dielectric engineering, drain dielectric pocket, gate overlap, and gate underlap engineering.
Besides low ION and poor RF performance, the other main challenge at the nanoscale level is the fabrication of TFET. The fabrication of metallurgical junctions at the nanoscale level is quite difficult. So, to overcome the fabrication challenge of TFET, researchers have suggested junctionless TFET (JLTFET). In JLTFET same doping concentration is used at the three terminals of the TFET, and then the required P+-I-N+ is obtained by the implementation of the charge plasma technique. Using the concept of Junctionless, homo-material Si-JLTFET is made. But homo-material JLTFET does not fulfill the researchers' expectations as it faces low ION and high IOFF. So, to overcome the challenges of homo-material JLTFET (low ION and high IOFF), researchers have suggested hetero-structure JLTFET by using different materials at the source and channel.
The present invention has a hetero-structure JLTFET, which uses Si1-xGex/GaAs as a semiconductor material. As Germanium mole composition (x) decides the behavior of the Si1-xGex/GaAs based JLTFET. So, in this paper, we have investigated the value of 'x' for which the reported device will deliver optimum performance.
Object(s) of the present invention:
The primary objective of the present invention is to overcome the drawback associated with prior art.
An object of the present invention is to provide a hetero-structure JLTFET, which uses Si1-xGex/GaAs as a semiconductor material. As Germanium mole composition (x) decides the behavior of the Si1-xGex/GaAs based JLTFET. So, in this paper, we have investigated the value of 'x' for which the reported device will deliver optimum performance.
Summary of the Invention:
In an embodiment, the device of the present invention has 2-D structure of Si1-xGex/GaAs-JLTFET. In this, smaller energy gap composite Si1-xGex is applied at the source area, and large energy gap composite GaAs is incorporated at the drain and channel area based on the energy gap technique. To block the leakage current through the gates, an equal thickness of HfO2 and SiO2 is used at both gates. To isolate the CG and PG, a gap of 2 nm is created between them.
Brief description of Drawings:
The accompanying drawings, which are incorporated in and constitute a part of this disclosure, illustrate exemplary embodiments and, together with the description, explain the disclosed principles. The reference numbers are used throughout the figures to describe the features and components. Some embodiments of system and/or methods in accordance with embodiments of the present subject matter are now described, by way of example only, and regarding the accompanying figures, in which
Figure 1: illustrates 2-D structure of Si1-xGex/GaAs-JLTFET.
Figure 2: illustrates Reported device calibration with respect to experimental based work.
Figure 3: illustrates IDS ~ VGS plot for multiple points of Germanium mole (x).
Figure 4: illustrates Log scale of IDS ~ VGS for multiple points of Germanium mole (x).
Figure 5: illustrates Subthreshold swing (SS) and ION/IOFF ratio for multiplel values of Germanium mole (x).
Figure 6: illustrates Band energy plot for several values of Germanium mole (x)..
Figure 7: illustrates Plot of gm for several fractions of Germanium mole (x).
Figure 8: illustrates Transconductance generation factor (TGF) plot for several fractions of Germanium mole (x).
Figure 9: illustrates Plot of gate to source capacitance (Cgs) for different fraction of Germanium mole (x).
Figure 10: illustrates Dependency of the gate to drain capacitance (Cgd) on several fraction of Germanium mole (x).
Figure 11: illustrates Curve of total gate-to-gate capacitance for several fraction of Germanium mole (x).
Figure 12: illustrates fT for several values of Germanium mole
Figure 13: illustrates GBWP plot for several fractions of Germanium mole (x).
Figure 14: illustrates Dependency of transit time on Ge mole fraction (x).
Detailed description of the invention:
In the present document, the word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment or implementation of the present subject matter described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
While the disclosure is susceptible to various modifications and alternative forms, specific embodiment thereof has been shown by way of example, in the drawings and will be described in detail below. It should be understood, however, that it is not intended to limit the disclosure to the specific forms disclosed, but on the contrary, the disclosure is to cover all modifications, equivalents, and alternative falling within the spirit and the scope of the disclosure.
The terms "comprises", "comprising", "includes", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a setup, device or method that comprises a list of components or steps does not include only those components or steps but may include other components or steps not expressly listed or inherent to such setup or device or method. In other words, one or more elements in a system or apparatus proceeded by "comprises... a" does not, without more constraints, preclude the existence of other elements or additional elements in the system or method.
In an embodiment, the device of the present invention has 2-D structure of Si1-xGex/GaAs-JLTFET. In this, smaller energy gap composite Si1-xGex is applied at the source area, and large energy gap composite GaAs is incorporated at the drain and channel area based on the energy gap technique. To block the leakage current through the gates, an equal thickness of HfO2 and SiO2 is used at both gates. To isolate the CG and PG, a gap of 2 nm is created between them. The remaining parameter's description is shown in Table. I
Si1-xGex/GaAs-JLTFET
Attributes Magnitude Units
Source/Channel/Drain Length 20 nm
CG/PG Thickness 2 nm
HfO2/SiO2 Thickness 1 nm
PG Work Function 5.93 eV
CG Work Function 4.5 eV
Si1-xGex/GaAs Material Thickness 3 nm
Spacer Thickness 2 nm
Spacer Length 2 nm
The Silvaco TCAD simulator is taken to simulate the reported device. The TCAD model is used to account for physical processes occurring in the device; the BTBT model is utilized to determine the pace at which recombination tunneling occurs. From this point of view, a quantum tunneling area is considered at the source/channel, and the channel/ drain boundary is specified to allow for reverse and forward tunneling. Since the trap-assistant tunneling model predominates in the OFF state, it is also activated. The carrier recombination process is taken into account using Auger recombination and the Shockley-Read-Hall models. The tunneling possibility is numerically premeditated using the Wentzel-Kramers-Brillouin approach. Additionally, to improve simulation preciseness, the quantum confinement model offered by Hansch is utilized. In simulations, we solved all the carrier transport mathematical equations numerically using Gummel and Newton's methods.
The calibration of the mathematical models which are used during simulation is performed with the help of SiGe/Si based experimental data [13], [17]. We have considered SiGe/Si based data due to unobtainability of the experimental data based on Si1-xGex/GaAs based material. For calibration, we plot the IDS ~ VGS graph (see Fig. 2) using the simulation software by considering the experimental data as an input. The narrow margin amongst the experimental graph and the simulated graph (refer Fig. 2) validates our models.
In Fig. 3, we have investigated the ION behavior of Si1-xGex/GaAs JLTFET for several fractions of Germanium mole (x). The figure shows that the device delivers the uppermost ION at x = 0.8 and the bottommost ION at x = 0.1. The value of ION at x = 0.8 and 0.9 is very close and differs by a small margin. The highest ION at x = 0.8, indicates that the developed device has the smallest energy gap betwixt the source's. valence band (VB) and channel's conduction band (CB) at this value. On the other side lowest ION at x = 0.1, indicates the maximum band gap between VB and CB of the source and channel, correspondingly.
For clear visibility of current variation, and IOFF log scale of IDS ~ VGS is plotted in Fig. 4. From the graph; it is hardheaded that Germanium mole has negligible effects on IOFF, whereas ION is mainly governed by Germanium mole fraction.
Fig. 5 represents the SS and ION/IOFF values of several values of Germanium mole. SS is the parameter that decides the switching capability of the device and gives the idea of how drain current varies with gate voltage. For a suitable device, the amplitude of SS should be small. From Fig. 5, it can be observed that the device has minimum SS at x = 0.2, but at this value, another parameter of the device is very low, so we have chosen SS at x = 0.8 value. Now the other parameter in Fig. 5 is the current ratio; for a suitable device, this attribute should be high. High values of ION/IOFF indicate high ION and low IOFF. The device gives a largest ION/IOFF ratio at x = 0.8, which obeys the result of Fig. 3.
Fig. 6 represents the band energy dependency of the Si1-xGex/GaAs compound for several values of Germanium mole. Since Si1-xGex is used at the source/channel interface, so variation in band gap is observed at this interface, whereas the band gap at the drain/channel interface is independent of Germanium mole fraction due to the use of GaAs at the drain and channel. The developed device has a smallest energy span at the source/channel interface for Germanium mole x = 0.8, which supports the previous results.
Fig. 7 represents the variation of gm for different values of 'x'. gm is a very crucial parameter, as it determines the behavior of a device at high frequency. So, for better RF performance, a high value of gm is desired. From Fig. 7, it is noted that the developed device provides largest gm at x = 0.8 and minimum gm at x = 0.1. So, for better RF performance, this graph suggests that 'x' should be taken at 0.8. The mathematical form of gm is represented in equation (1).
(1)
TGF is another crucial attribute that determines the efficiency of a device. It is linearly dependent on gm and oppositely depends on IDS. The proposed device has the highest amplitude of TGF at x = 0.8 (see Fig. 8), which is obtained due to the superiority of gm upon IDS at this value. The mathematical form of TGF is written in equation (2).
(2)
Fig. 9 and Fig. 10 depict the two different types of parasitic capacitances (Cgs and Cgd), and their total (Cgg = Cgs + Cgd) is depicted in Fig. 11. These parasitic capacitances play a crucial factor in determining a device's RF performance. For better RF attributes, it is expected that the device should have lower values of parasitic capacitance. From this point of view, it is noted that the developed device has the lowest value of parasitic capacitance at x = 0.8. The other point, which is noted from Fig. 9, 10, and 11, is that graph is terminated for higher gate voltages at x= 0.2 due to the increased depletion region. It means the reported device shows its superiority in terms of RF performance at x = 0.8 of the Germanium mole percentage.
Fig. 12 discusses the fT of the reported device for multiple fraction values of Germanium mole (x) in the Si1-xGex composite. As fT is characterized as the frequency at which the output or performance of the systems starts to degrade. So, for good RF behavior, this parameter is expected to be high. The mathematical form of fT is expressed as in equation (3)[7]. In Fig. 12, the device provides maximum fT at x = 0.8 value.
(3)
In Fig. 13, the GBWP of the reported device is discussed by varying the Germanium mole fraction (x). It is described as the frequency range for which a device may be functional. So for a higher range of functionality, it should be higher, and this highest value is obtained at x = 0.8. The mathematical form of GBWP is written in equation (4).
In Fig. 14, transit time is shown for several fractions of Ge mole (x). Transit time (t) is the time that the electrons/holes use to get from the source to the drain. In other words, it is time that is required by the device to perform its operation. So little value of 't' denotes the fast operation of the device, and a big value of 't' denotes the slow operation of the device. From Fig. 14, it is observed that the device shows its fast response behavior at x = 0.8. In mathematics, this term is inversely proportional to the fT, as expressed in equation (5).
(5)
In an embodiment, in the the present invention the impact of Germanium mole composition on the RF attributes of the Si1-xGex/GaAs JLTFET has been investigated. The device is made by using a combined approach of band gap and gate dielectric engineering. Both engineering techniques improve performance. But the other factor on which the outcomes of the proposed device depend critically is the Ge mole fraction (x). In this paper, we have performed the analysis to find the most suitable value of the 'x'. For this, we have performed the analysis in terms of RF attributes like gm, TGF, Cgs, Cgd, Cgg, fT, GBWP, and t. For all these parameters, we have obtained the maximum value at x = 0.8 of the Germanium mole fractions. On the other hand, the device's attributes suffer at the lowest values due to high depletion region formation. This indicates that for fast response and high frequency application of the developed device, Germanium mole composition x = 0.8 is a preferable choice.
, Claims:FORM 2
THE PATENTS ACT, 1970
(39 OF 1970)
&
THE PATENTS RULES, 2003
COMPLETE SPECIFICATION
(See section 10; rule 13)
Title: Optimizing RF Parameters in Novel Si1-xGex/GaAs JLTFET through Ge Mole Fraction Variation
APPLICANT DETAILS:
(a) NAME: GRAPHIC ERA DEEMED TO BE UNIVERSITY
(b) NATIONALITY: Indian
(c) ADDRESS: 566/6, Bell Road, Society Area, Clement Town, Dehradun - 248002,
Uttarakhand, India
PREAMBLE TO THE DESCRIPTION:
The following specification particularly describes the nature of this invention and the manner in which it is to be performed.
Optimizing RF Parameters in Novel Si1-xGex/GaAs JLTFET through Ge Mole Fraction Variation
Field of Invention:
The present invention relates to system and method to access the influence of the Germanium mole (x) on the RF parameters of the novel Si1-xGex/GaAs junctionless TFET (JLTFET).
Background of the Invention.
The following background discussion includes information that may be useful in understanding the present invention. It is not an admission that any of the information provided herein is prior art or relevant to the presently claimed invention, or that any publication expressly or implicitly referenced is prior art.
To fulfill the demand of the technology, the dimension of the MOSFET is decreasing day by day. This size reduction has benefits in terms of compactness, efficiency, and easy transportation, but on the other side, this reduction has demerits like fabrication complexity, short channel effects (SCSs), drip current, and subthreshold swing (SS) restraint of 60 mV/dec. To overcome these challenges, researchers have inclined their interest to tunnel field effect transistors (TFET).
In TFET, the source and drain are made using the opposite nature of the substrate. Due to this, TFET is less vulnerable to SCEs and RDFs. The other distinction betwixt TFET and MOSFET is their working mechanism. MOSFET supports the emission of charge carriers over the channel when the temperature rises; on the other side, TFET follows the band-to-band tunneling (BTBT) phenomenon. Due to the BTBT mechanism, the SS of TFET can cross the 60 mV/decade limitation of MOSFET, and also it provides low OFF-state current (IOFF). Although TFET has numerous advantages over MOSFET, but it also has some disadvantages. The foremost downsides of TFET are the low ION, ambipolar current, and poorest radio frequency (RF) performance, which occurs due to the BTBT mechanism of TFET. To enhance the ION and suppress IOFF, researchers have suggested so many techniques like band gap engineering, gate dielectric engineering, drain dielectric pocket, gate overlap, and gate underlap engineering.
Besides low ION and poor RF performance, the other main challenge at the nanoscale level is the fabrication of TFET. The fabrication of metallurgical junctions at the nanoscale level is quite difficult. So, to overcome the fabrication challenge of TFET, researchers have suggested junctionless TFET (JLTFET). In JLTFET same doping concentration is used at the three terminals of the TFET, and then the required P+-I-N+ is obtained by the implementation of the charge plasma technique. Using the concept of Junctionless, homo-material Si-JLTFET is made. But homo-material JLTFET does not fulfill the researchers' expectations as it faces low ION and high IOFF. So, to overcome the challenges of homo-material JLTFET (low ION and high IOFF), researchers have suggested hetero-structure JLTFET by using different materials at the source and channel.
The present invention has a hetero-structure JLTFET, which uses Si1-xGex/GaAs as a semiconductor material. As Germanium mole composition (x) decides the behavior of the Si1-xGex/GaAs based JLTFET. So, in this paper, we have investigated the value of 'x' for which the reported device will deliver optimum performance.
Object(s) of the present invention:
The primary objective of the present invention is to overcome the drawback associated with prior art.
An object of the present invention is to provide a hetero-structure JLTFET, which uses Si1-xGex/GaAs as a semiconductor material. As Germanium mole composition (x) decides the behavior of the Si1-xGex/GaAs based JLTFET. So, in this paper, we have investigated the value of 'x' for which the reported device will deliver optimum performance.
Summary of the Invention:
In an embodiment, the device of the present invention has 2-D structure of Si1-xGex/GaAs-JLTFET. In this, smaller energy gap composite Si1-xGex is applied at the source area, and large energy gap composite GaAs is incorporated at the drain and channel area based on the energy gap technique. To block the leakage current through the gates, an equal thickness of HfO2 and SiO2 is used at both gates. To isolate the CG and PG, a gap of 2 nm is created between them.
Brief description of Drawings:
The accompanying drawings, which are incorporated in and constitute a part of this disclosure, illustrate exemplary embodiments and, together with the description, explain the disclosed principles. The reference numbers are used throughout the figures to describe the features and components. Some embodiments of system and/or methods in accordance with embodiments of the present subject matter are now described, by way of example only, and regarding the accompanying figures, in which
Figure 1: illustrates 2-D structure of Si1-xGex/GaAs-JLTFET.
Figure 2: illustrates Reported device calibration with respect to experimental based work.
Figure 3: illustrates IDS ~ VGS plot for multiple points of Germanium mole (x).
Figure 4: illustrates Log scale of IDS ~ VGS for multiple points of Germanium mole (x).
Figure 5: illustrates Subthreshold swing (SS) and ION/IOFF ratio for multiplel values of Germanium mole (x).
Figure 6: illustrates Band energy plot for several values of Germanium mole (x)..
Figure 7: illustrates Plot of gm for several fractions of Germanium mole (x).
Figure 8: illustrates Transconductance generation factor (TGF) plot for several fractions of Germanium mole (x).
Figure 9: illustrates Plot of gate to source capacitance (Cgs) for different fraction of Germanium mole (x).
Figure 10: illustrates Dependency of the gate to drain capacitance (Cgd) on several fraction of Germanium mole (x).
Figure 11: illustrates Curve of total gate-to-gate capacitance for several fraction of Germanium mole (x).
Figure 12: illustrates fT for several values of Germanium mole
Figure 13: illustrates GBWP plot for several fractions of Germanium mole (x).
Figure 14: illustrates Dependency of transit time on Ge mole fraction (x).
Detailed description of the invention:
In the present document, the word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any embodiment or implementation of the present subject matter described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments.
While the disclosure is susceptible to various modifications and alternative forms, specific embodiment thereof has been shown by way of example, in the drawings and will be described in detail below. It should be understood, however, that it is not intended to limit the disclosure to the specific forms disclosed, but on the contrary, the disclosure is to cover all modifications, equivalents, and alternative falling within the spirit and the scope of the disclosure.
The terms "comprises", "comprising", "includes", or any other variations thereof, are intended to cover a non-exclusive inclusion, such that a setup, device or method that comprises a list of components or steps does not include only those components or steps but may include other components or steps not expressly listed or inherent to such setup or device or method. In other words, one or more elements in a system or apparatus proceeded by "comprises... a" does not, without more constraints, preclude the existence of other elements or additional elements in the system or method.
In an embodiment, the device of the present invention has 2-D structure of Si1-xGex/GaAs-JLTFET. In this, smaller energy gap composite Si1-xGex is applied at the source area, and large energy gap composite GaAs is incorporated at the drain and channel area based on the energy gap technique. To block the leakage current through the gates, an equal thickness of HfO2 and SiO2 is used at both gates. To isolate the CG and PG, a gap of 2 nm is created between them. The remaining parameter's description is shown in Table. I
Si1-xGex/GaAs-JLTFET
Attributes Magnitude Units
Source/Channel/Drain Length 20 nm
CG/PG Thickness 2 nm
HfO2/SiO2 Thickness 1 nm
PG Work Function 5.93 eV
CG Work Function 4.5 eV
Si1-xGex/GaAs Material Thickness 3 nm
Spacer Thickness 2 nm
Spacer Length 2 nm
The Silvaco TCAD simulator is taken to simulate the reported device. The TCAD model is used to account for physical processes occurring in the device; the BTBT model is utilized to determine the pace at which recombination tunneling occurs. From this point of view, a quantum tunneling area is considered at the source/channel, and the channel/ drain boundary is specified to allow for reverse and forward tunneling. Since the trap-assistant tunneling model predominates in the OFF state, it is also activated. The carrier recombination process is taken into account using Auger recombination and the Shockley-Read-Hall models. The tunneling possibility is numerically premeditated using the Wentzel-Kramers-Brillouin approach. Additionally, to improve simulation preciseness, the quantum confinement model offered by Hansch is utilized. In simulations, we solved all the carrier transport mathematical equations numerically using Gummel and Newton's methods.
The calibration of the mathematical models which are used during simulation is performed with the help of SiGe/Si based experimental data [13], [17]. We have considered SiGe/Si based data due to unobtainability of the experimental data based on Si1-xGex/GaAs based material. For calibration, we plot the IDS ~ VGS graph (see Fig. 2) using the simulation software by considering the experimental data as an input. The narrow margin amongst the experimental graph and the simulated graph (refer Fig. 2) validates our models.
In Fig. 3, we have investigated the ION behavior of Si1-xGex/GaAs JLTFET for several fractions of Germanium mole (x). The figure shows that the device delivers the uppermost ION at x = 0.8 and the bottommost ION at x = 0.1. The value of ION at x = 0.8 and 0.9 is very close and differs by a small margin. The highest ION at x = 0.8, indicates that the developed device has the smallest energy gap betwixt the source's. valence band (VB) and channel's conduction band (CB) at this value. On the other side lowest ION at x = 0.1, indicates the maximum band gap between VB and CB of the source and channel, correspondingly.
For clear visibility of current variation, and IOFF log scale of IDS ~ VGS is plotted in Fig. 4. From the graph; it is hardheaded that Germanium mole has negligible effects on IOFF, whereas ION is mainly governed by Germanium mole fraction.
Fig. 5 represents the SS and ION/IOFF values of several values of Germanium mole. SS is the parameter that decides the switching capability of the device and gives the idea of how drain current varies with gate voltage. For a suitable device, the amplitude of SS should be small. From Fig. 5, it can be observed that the device has minimum SS at x = 0.2, but at this value, another parameter of the device is very low, so we have chosen SS at x = 0.8 value. Now the other parameter in Fig. 5 is the current ratio; for a suitable device, this attribute should be high. High values of ION/IOFF indicate high ION and low IOFF. The device gives a largest ION/IOFF ratio at x = 0.8, which obeys the result of Fig. 3.
Fig. 6 represents the band energy dependency of the Si1-xGex/GaAs compound for several values of Germanium mole. Since Si1-xGex is used at the source/channel interface, so variation in band gap is observed at this interface, whereas the band gap at the drain/channel interface is independent of Germanium mole fraction due to the use of GaAs at the drain and channel. The developed device has a smallest energy span at the source/channel interface for Germanium mole x = 0.8, which supports the previous results.
Fig. 7 represents the variation of gm for different values of 'x'. gm is a very crucial parameter, as it determines the behavior of a device at high frequency. So, for better RF performance, a high value of gm is desired. From Fig. 7, it is noted that the developed device provides largest gm at x = 0.8 and minimum gm at x = 0.1. So, for better RF performance, this graph suggests that 'x' should be taken at 0.8. The mathematical form of gm is represented in equation (1).
(1)
TGF is another crucial attribute that determines the efficiency of a device. It is linearly dependent on gm and oppositely depends on IDS. The proposed device has the highest amplitude of TGF at x = 0.8 (see Fig. 8), which is obtained due to the superiority of gm upon IDS at this value. The mathematical form of TGF is written in equation (2).
(2)
Fig. 9 and Fig. 10 depict the two different types of parasitic capacitances (Cgs and Cgd), and their total (Cgg = Cgs + Cgd) is depicted in Fig. 11. These parasitic capacitances play a crucial factor in determining a device's RF performance. For better RF attributes, it is expected that the device should have lower values of parasitic capacitance. From this point of view, it is noted that the developed device has the lowest value of parasitic capacitance at x = 0.8. The other point, which is noted from Fig. 9, 10, and 11, is that graph is terminated for higher gate voltages at x= 0.2 due to the increased depletion region. It means the reported device shows its superiority in terms of RF performance at x = 0.8 of the Germanium mole percentage.
Fig. 12 discusses the fT of the reported device for multiple fraction values of Germanium mole (x) in the Si1-xGex composite. As fT is characterized as the frequency at which the output or performance of the systems starts to degrade. So, for good RF behavior, this parameter is expected to be high. The mathematical form of fT is expressed as in equation (3)[7]. In Fig. 12, the device provides maximum fT at x = 0.8 value.
(3)
In Fig. 13, the GBWP of the reported device is discussed by varying the Germanium mole fraction (x). It is described as the frequency range for which a device may be functional. So for a higher range of functionality, it should be higher, and this highest value is obtained at x = 0.8. The mathematical form of GBWP is written in equation (4).
In Fig. 14, transit time is shown for several fractions of Ge mole (x). Transit time (t) is the time that the electrons/holes use to get from the source to the drain. In other words, it is time that is required by the device to perform its operation. So little value of 't' denotes the fast operation of the device, and a big value of 't' denotes the slow operation of the device. From Fig. 14, it is observed that the device shows its fast response behavior at x = 0.8. In mathematics, this term is inversely proportional to the fT, as expressed in equation (5).
(5)
In an embodiment, in the the present invention the impact of Germanium mole composition on the RF attributes of the Si1-xGex/GaAs JLTFET has been investigated. The device is made by using a combined approach of band gap and gate dielectric engineering. Both engineering techniques improve performance. But the other factor on which the outcomes of the proposed device depend critically is the Ge mole fraction (x). In this paper, we have performed the analysis to find the most suitable value of the 'x'. For this, we have performed the analysis in terms of RF attributes like gm, TGF, Cgs, Cgd, Cgg, fT, GBWP, and t. For all these parameters, we have obtained the maximum value at x = 0.8 of the Germanium mole fractions. On the other hand, the device's attributes suffer at the lowest values due to high depletion region formation. This indicates that for fast response and high frequency application of the developed device, Germanium mole composition x = 0.8 is a preferable choice.
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Name | Date |
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202411087990-COMPLETE SPECIFICATION [14-11-2024(online)].pdf | 14/11/2024 |
202411087990-DECLARATION OF INVENTORSHIP (FORM 5) [14-11-2024(online)].pdf | 14/11/2024 |
202411087990-DRAWINGS [14-11-2024(online)].pdf | 14/11/2024 |
202411087990-EDUCATIONAL INSTITUTION(S) [14-11-2024(online)].pdf | 14/11/2024 |
202411087990-EVIDENCE FOR REGISTRATION UNDER SSI(FORM-28) [14-11-2024(online)].pdf | 14/11/2024 |
202411087990-FORM 1 [14-11-2024(online)].pdf | 14/11/2024 |
202411087990-FORM FOR SMALL ENTITY(FORM-28) [14-11-2024(online)].pdf | 14/11/2024 |
202411087990-FORM-9 [14-11-2024(online)].pdf | 14/11/2024 |
202411087990-POWER OF AUTHORITY [14-11-2024(online)].pdf | 14/11/2024 |
202411087990-REQUEST FOR EARLY PUBLICATION(FORM-9) [14-11-2024(online)].pdf | 14/11/2024 |
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