METHODS AND SYSTEMS FOR EQUAL LOAD-SHARING BETWEEN AT LEAST TWO PARALLELED INVERTER MODULES

Abstract

ABSTRACT METHODS AND SYSTEMS FOR EQUAL LOAD-SHARING BETWEEN AT LEAST TWO PARALLELED INVERTER MODULES Embodiments herein disclose methods and systems for equal load-sharing between at least two paralleled inverter modules (102-1, …, 102-n). The method comprises monitoring the input DC current drawn by each inverter module using a load share controller. Upon detecting that one inverter module is drawing less current than the others, the load share controller of the corresponding inverter module generates an error signal. This error signal is then optically isolated and fed into the control loop of a DC-DC converter. The optically isolated error signal adjusts the output DC voltage of the inverter module with the lower current draw, thereby equalizing the input DC current across all inverter modules and ensuring balanced load sharing. FIG. 1B

Specification

Description:TECHNICAL FIELD
[001] Embodiments disclosed herein relate to power electronics, and more particularly to methods and systems for equal load sharing between at least two paralleled inverter modules.
BACKGROUND
[002] In real-life applications, inverter modules are often connected in parallel either to increase power delivery capacity (e.g., combining two 100 W modules to achieve 200 W) or to provide active redundancy. In both cases, it is essential that: 1) a failure in one module does not impact the other module, and 2) the total load current is equally shared among the modules. Paralleling DC output modules and associated load-sharing are well-known; however, paralleling AC output modules is more complex. To connect AC modules in parallel, they must be synchronized in both phase and frequency, and load sharing requires each module's AC output current to be measured, and corrective control to be applied accordingly, making equal current distribution a challenging task.
[003] Hence, there is a need in the art for solutions which will overcome the above mentioned drawback(s), among others.
OBJECTS
[004] The principal object of embodiments herein is to disclose methods and systems for equally sharing load among at least two paralleled inverters connected to a common DC input.
[005] Another object of embodiments herein is to disclose a methodology that adjusts the output current of each inverter module to achieve equal load sharing among the at least two paralleled inverter modules.
[006] Another object of embodiments herein is to enable the inverters to continue functioning independently in the event of a failure in one inverter, thereby supporting active redundancy and ensuring uninterrupted power delivery.
[007] Another object of the embodiments herein is to disclose a system configuration that achieves galvanic isolation between the input DC source and the output AC load, enhancing safety and improving noise immunity in large systems.
[008] These and other aspects of the embodiments herein will be better appreciated and understood when considered in conjunction with the following description and the accompanying drawings. It should be understood, however, that the following descriptions, while indicating at least one embodiment and numerous specific details thereof, are given by way of illustration and not of limitation. Many changes and modifications may be made within the scope of the embodiments herein without departing from the spirit thereof, and the embodiments herein include all such modifications.
BRIEF DESCRIPTION OF FIGURES
[009] Embodiments herein are illustrated in the accompanying drawings, throughout which like reference letters indicate corresponding parts in the various figures. The embodiments herein will be better understood from the following description with reference to the following illustratory drawings. Embodiments herein are illustrated by way of examples in the accompanying drawings, and in which:
[0010] FIG. 1A illustrates a block diagram of the system with at least two inverter modules, according to embodiments as disclosed herein;
[0011] FIG. 1B illustrates an example system for load-sharing with two inverter modules connected in parallel, according to the embodiments herein;
[0012] FIG. 2 illustrates a flow chart for a method of equal load-sharing in at least two paralleled inverter modules, according to embodiments as disclosed herein;
[0013] FIGs. 3A and 3B show the load current being supplied by any of the inverter modules, according to embodiments as disclosed herein;
[0014] FIG. 3C shows load-sharing by the inverter modules when the load current is 2A, according to embodiments as disclosed herein;
[0015] FIG. 3D shows load-sharing by the inverter modules when the load current is 4A, according to embodiments as disclosed herein;
[0016] FIG. 3E shows load-sharing by the inverter modules when the load current is 8A, according to embodiments as disclosed herein; and
[0017] FIG. 3F depicts equal load-sharing between the at least two inverter modules even at minimum input and minimum load current, according to the embodiments herein.


DETAILED DESCRIPTION
[0018] The embodiments herein and the various features and advantageous details thereof are explained more fully with reference to the non-limiting embodiments that are illustrated in the accompanying drawings and detailed in the following description. Descriptions of well-known components and processing techniques are omitted so as to not unnecessarily obscure the embodiments herein. The examples used herein are intended merely to facilitate an understanding of ways in which the embodiments herein may be practiced and to further enable those of skill in the art to practice the embodiments herein. Accordingly, the examples should not be construed as limiting the scope of the embodiments herein.
[0019] For the purposes of interpreting this specification, the definitions (as defined herein) will apply and whenever appropriate the terms used in singular will also include the plural and vice versa. It is to be understood that the terminology used herein is for the purposes of describing particular embodiments only and is not intended to be limiting. The terms "comprising", "having" and "including" are to be construed as open-ended terms unless otherwise noted.
[0020] The words/phrases "exemplary", "example", "illustration", "in an instance", "and the like", "and so on", "etc.", "etcetera", "e.g.," , "i.e.," are merely used herein to mean "serving as an example, instance, or illustration." Any embodiment or implementation of the present subject matter described herein using the words/phrases "exemplary", "example", "illustration", "in an instance", "and the like", "and so on", "etc.", "etcetera", "e.g.," , "i.e.," is not necessarily to be construed as preferred or advantageous over other embodiments.
[0021] Embodiments herein may be described and illustrated in terms of blocks which carry out a described function or functions. These blocks, which may be referred to herein as managers, units, modules, hardware components or the like, are physically implemented by analog and/or digital circuits such as logic gates, integrated circuits, microprocessors, microcontrollers, memory circuits, passive electronic components, active electronic components, optical components, hardwired circuits and the like, and may optionally be driven by a firmware. The circuits may, for example, be embodied in one or more semiconductor chips, or on substrate supports such as printed circuit boards and the like. The circuits constituting a block may be implemented by dedicated hardware, or by a processor (e.g., one or more programmed microprocessors and associated circuitry), or by a combination of dedicated hardware to perform some functions of the block and a processor to perform other functions of the block. Each block of the embodiments may be physically separated into two or more interacting and discrete blocks without departing from the scope of the disclosure. Likewise, the blocks of the embodiments may be physically combined into more complex blocks without departing from the scope of the disclosure.
[0022] It should be noted that elements in the drawings are illustrated for the purposes of this description and ease of understanding and may not have necessarily been drawn to scale. For example, the flowcharts/sequence diagrams illustrate the method in terms of the steps required for understanding of aspects of the embodiments as disclosed herein. Furthermore, in terms of the construction of the device, one or more components of the device may have been represented in the drawings by conventional symbols, and the drawings may show only those specific details that are pertinent to understanding the present embodiments so as not to obscure the drawings with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein. Furthermore, in terms of the system, one or more components/modules which comprise the system may have been represented in the drawings by conventional symbols, and the drawings may show only those specific details that are pertinent to understanding the present embodiments so as not to obscure the drawings with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.
[0023] The accompanying drawings are used to help easily understand various technical features and it should be understood that the embodiments presented herein are not limited by the accompanying drawings. As such, the present disclosure should be construed to extend to any modifications, equivalents, and substitutes in addition to those which are particularly set out in the accompanying drawings and the corresponding description. Usage of words such as first, second, third etc., to describe components/elements/steps is for the purposes of this description and should not be construed as sequential ordering/placement/occurrence unless specified otherwise.
[0024] The embodiments herein achieve equal load sharing among at least two paralleled inverter modules connected to a common DC input. Referring now to the drawings, and more particularly to FIGS. 1 through 3F, where similar reference characters denote corresponding features consistently throughout the figures, there are shown embodiments.
[0025] FIG. 1A illustrates a block diagram of a system 100 with at least two inverter modules 102-1 to 102-n connected in parallel for load-sharing, according to the embodiments herein. The system 100 comprises a common DC input source 101, a plurality of inverter modules 102-1 to 102-n, and a load 104.
[0026] FIG. 1B illustrates an example system 100 for load-sharing with two inverter modules connected in parallel, according to the embodiments herein. FIG. 1B is explained considering two inverter modules. Embodiments herein however are not limited to only two paralleled inverter modules and can be extended to more than two paralleled inverter modules.
[0027] According to the embodiments herein, the system 100 can comprise more than two paralleled inverter modules based on the load. The terms "paralleled inverter modules" and "inverter modules" are used interchangeably hereinafter. The system 100 comprises a common DC input source 101, which supplies power to the inverter modules 102-1 and 102-2. Each inverter module in the system 100 comprises a DC-DC converter 106-1, 106-2 which is responsible for regulating and, if necessary, stepping up or stepping down the input DC voltage to a suitable level for the inverter operation. This DC-DC converter 106-1, 106-2 ensures a stable uni-directional sinusoidal output voltage that can be efficiently converted into AC. Each of the inverter modules 102-1, 102-2 comprises a current-sensing resistor 107-1 and 107-2 respectively, for measuring an input current of each of the inverter modules 102-1 and 102-2.
[0028] Each of the inverter modules 102-1 and 102-2 comprises a current share and shared controller 108-1, 108-2. The terms "load-share controller" and "current share and shared controller", and "current share and shared IC" have been used interchangeably hereinafter. The load-share controller 108-1, 108-2 monitors the current drawn by the inverter modules 102-1 and 102-2 from the common DC input source 101. The DC-DC converter 106-1, 106-2 plays a critical role by modulating its output based on the feedback received from the load share controller 108-1, 108-2. The load-share controller 108-1, 108-2 comprises a share bus 110-1, 110-2 that communicates between the inverter modules 102-1 and 102-2. The share bus 110-1, 110-2 provides a signal based on the currents drawn by the corresponding inverter module. If one inverter module draws less current than another parallel inverter module, the corresponding load-share controller generates an error signal to modulate the output of the DC-DC converter associated with the inverter module, which is drawing less current. This error signal signals the DC-DC converter to increase its output voltage, thereby causing the inverter module to draw more current, and balance the load between the inverter modules.
[0029] Each of the inverter modules 102-1 and 102-2 comprises an opto-isolator for optically isolating the error signal generated by the corresponding load share controller 108-1, 108-2 before being fed back to the control loop of the corresponding DC-DC converter 106-1, 106-2. The opto-isolator thereby generates an opto-isolation correction signal 112-1, 112-2. This opto-isolated correction signal is used to adjust the DC output voltage of the corresponding DC-DC converter, which in turn helps balance the current drawn by the two inverter modules 102-1 and 102-2.
[0030] When the system 100 detects an abnormal operating condition in any of the inverter modules, such as overcurrent, undervoltage, or overheating, the system 100 generates a fault detection signal 114-1, 114-2. This fault detection signal 114-1, 114-2 indicates a potential failure or malfunction within the inverter module. When a fault detection signal is triggered, it alerts the system 100 to take at least one protective action (for example, isolating the faulty inverter module), thereby not disturbing the load.
[0031] The regulated or adjusted DC voltage from the DC-DC converter 106-1, 106-2 is fed to a full-bridge unfolding network 116-1, 116-2. The full-bridge unfolding network 116-1, 116-2 is essential in generating an AC waveform from the regulated unidirectional sinusoidal DC voltage provided by the DC-DC converter 106-1, 106-2. Each full-bridge unfolding network 116-1, 116-2 comprises one or more power transistors; such as, but not limited to, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) or IGBTs (Insulated-Gate Bipolar Transistors) that switch on and off. These transistors are controlled in a manner that creates an alternating current from the DC source, which is then shaped into a sinusoidal waveform for AC output. The output voltage of the sine wave is floating with respect to the output of the DC-DC converter 106-1, 106-2 and is galvanically isolated from the input DC source. This full-bridge unfolding network 116-1, 116-2 must be synchronized across the inverter modules 102-1 and 102-2 to ensure they operate in phase and at the same frequency. This synchronization is usually managed by a common AC reference signal, which originates from the common reference sinewave generator 111. As shown in FIG. 1B, the output of the DC-DC converters 106-1, 106-2 feeds a full-bridge unfolding network 116-1, 116-2 with four MOSFET switches (Sw1 to Sw4), where diagonal switches are driven alternately to produce a full sine wave. This output voltage is floating relative to the DC-DC converter's output and is galvanically isolated from the input DC source.
[0032] The output of each of the inverter modules 102-1 and 102-2 is connected to the load 104 via a bi-directional switch 118-1, 118-2 present in each of the inverter modules 102-1, 102-2. The bi-directional switch 118-1, 118-2 switch is a controlled switch which can be turned on and off with a control signal generated by the fault detection generator. Whenever the fault detection signal is triggered, the bi-directional switch 118-1, 118-2 is turned off thereby isolating that particular inverter module.
[0033] Embodiments herein provide a technique to measure the input DC current drawn by each inverter and adjust them to be equal, thereby ensuring that the output AC current is also evenly shared. This approach simplifies load sharing by balancing the DC input current directly, rather than relying on the more complex method of extracting and controlling the AC output current to achieve equal load distribution.
[0034] FIG. 2 illustrates a flow chart for a method 200 for performing equal load-sharing in at least two paralleled inverter modules, according to the embodiments herein. At step 202, the load share controller of each of the at least two paralleled inverter modules monitors the input DC current drawn by the at least two inverter modules. At step 204, the load share controller generates an error signal upon detecting that one of the inverter modules is drawing less current than the others. The error signal is generated by the load share controller of the inverter module which draws lesser current than the others. At step 206, the load share controller feeds an optically-isolated error signal into the control loop of a DC-DC converter of the inverter module drawing less current. At step 208, this optically isolated error signal adjusts the output DC voltage of the inverter module with the lower current draw, ensuring that the input DC current is equalized across all inverter modules.
[0035] The method comprises measuring an input DC current from a DC source using a current sensing resistor, wherein the input DC current is fed to the DC-DC converter. The method further comprises receiving, by a full-bridge unfolding network, a regulated unidirectional sinusoidal DC voltage provided by the DC-DC converter to generate an AC waveform, wherein the AC waveform is floating with respect to the output of the DC-DC converter and is galvanically isolated from the input DC current. Additionally, the method includes connecting an output of each of the at least two paralleled inverter modules to the load through a bi-directional switch. The method also involves communicating a signal between the at least two inverter modules using a share bus connected to the load-share controller, based on currents drawn by each of the at least two inverter modules. Furthermore, the method comprises generating a fault detection signal on detecting an abnormal operating condition in any of the at least two inverter modules and generating alerts to take protective actions to isolate a faulty inverter module from the at least two inverter modules.
[0036] The various actions in method 200 may be performed in the order presented, in a different order or simultaneously. Further, in some embodiments, some actions listed in FIG. 2 may be omitted.


Experimental details:
[0037] The following paragraphs describe the experimental details of how two paralleled inverter modules M1 and M2 work under various load conditions (0A, 2A, 4A, and 8A) and with variations in the input DC voltage. Each scenario illustrates the dynamics of equal load sharing and voltage regulation, demonstrating the system's ability to maintain stability and balance under changing load conditions and input fluctuations.
[0038] FIG. 3A shows the inverter module M1 being in the ON state and the inverter module M2 in the OFF state. The inverter module M1 displays an output AC voltage of around 108 V and drawing a current of 3A as required by the load connected (3.017A as shown by the multimeter 302). FIG. 3B shows the inverter module M2 being in the ON state and the inverter module M1 in the OFF state. The inverter module M2 displays an output AC voltage of around 109 V and drawing a current of ~3A as required by the load connected which is also ~3A.
[0039] When the load current is at 0A, the inverter modules M1 and M2 are connected to the DC source but are not actively delivering current to a load. At this stage, the focus is on voltage stability, with both inverter modules in standby mode, monitoring input DC voltage variations. As the input DC voltage changes, the inverter modules M1 and M2 maintain stable voltage levels, ensuring synchronization with the DC source despite the absence of active load. Table 1 illustrates how the output AC voltage remains unchanged with the variation of the input DC voltage.
INPUT VOLTAGE DC M 1 CURRENT M 2 CURRENT OUTPUT VOLTAGE
95 VDC 0 AMPS 0 AMPS 110.0 VAC
110 VDC 0 AMPS 0 AMPS 110.0 VAC
135 VDC 0 AMPS 0 AMPS 110.0 VAC
Table 1

[0040] With a load current of 2A, the inverter modules M1 and M2 equally share the load, as illustrated by FIG. 3C, thereby splitting the current equally. Table 2 illustrates how load-sharing at 2A load and how the load-sharing remains unaffected with the variation of the input DC voltage. This shows that the system delivers a consistent 2A to the load with minimal deviation between the contributions from M1 and M2.
LOAD CURRENT 02 A
INPUT VOLTAGE DC M 1 CURRENT M 2 CURRENT OUTPUT VOLTAGE
95 VDC 1 AMPS 1 AMPS 110.0 VAC
110 VDC 1 AMPS 1 AMPS 110.0 VAC
135 VDC 1 AMPS 1 AMPS 109.8 VAC
Table 2
[0041] Table 3 illustrates how load-sharing at 4A load and how the load-sharing remains unaffected with the variation of the input DC voltage. With a load current of 4A, the inverter modules M1 and M2 equally share the load, as illustrated by FIG. 3D, thereby splitting the current equally.
LOAD CURRENT 04 A
INPUT VOLTAGE DC M 1 CURRENT M 2 CURRENT OUTPUT VOLTAGE
95 VDC 2 AMPS 2 AMPS 109.8 VAC
110 VDC 2 AMPS 2 AMPS 110.0 VAC
135 VDC 1.9 AMPS 2.1 AMPS 110.0 VAC
Table 3

[0042] Table 4 illustrates how load-sharing at 8A load and how the load-sharing remains unaffected with the variation of the input DC voltage. With a load current of 8A, the inverter modules M1 and M2 equally share the load, as illustrated by FIG. 3E, thereby splitting the current equally.
LOAD CURRENT 08 A
INPUT VOLTAGE DC M 1 CURRENT M 2 CURRENT OUTPUT VOLTAGE
95 VDC 3.9 AMPS 4.1 AMPS 109.3 VAC
110 VDC 3.8 AMPS 4.2 AMPS 109.4 VAC
135 VDC 3.8 AMPS 4.2 AMPS 108.5 VAC
Table 4
[0043] The performance of the individual inverter modules M1 and M2 is provided in Tables 5 and 6 as shown below. In Table 5, the data shows that as the load current on Module 1 increases, the output AC voltage experiences a slight decrease despite varying input DC voltages. At 0A load, the output remains stable at around 109 VAC across input voltages of 95 VDC, 110 VDC, and 135 VDC. However, at 2A load, there is a minimal drop (e.g., 108.9 VAC at 95 VDC input), and at 4A load, the output decreases more notably (down to 107.5 VAC at 135 VDC input). As shown in Table 6, the output AC voltage remains highly stable across varying input DC voltages and different load currents. At 0A load, the output is consistently around 109.3 VAC, regardless of the input voltage. As the load increases to 2A and 4A, the output AC voltage shows only a minor decrease, such as 109.1 VAC at 2A and 109.0 VAC at 4A with a 95 VDC input.
MODULE 1
INPUT VOLTAGE DC OUTPUT VOLTAGE AC
0 AMPS 02 AMPS 04 AMPS

95 VDC 109VAC 108.9VAC 108.5VAC
110 VDC 109VAC 109VAC 108.2VAC
135 VDC 109VAC 109VAC 107.5VAC

Table 5




MODULE 2
INPUT VOLTAGE DC OUTPUT VOLTAGE AC
0 AMPS 02 AMPS 04 AMPS

95 VDC 109.3VAC 109.1VAC 109.0VAC
110 VDC 109.3VAC 109.2VAC 109.1VAC
135 VDC 109.3VAC 109.3VAC 109.0VAC

Table 6
[0044] FIG. 3F depicts equal load-sharing between the at least two inverter modules even at minimum input and minimum load current, according to the embodiments herein. As shown in FIG. 3F, the inverter modules M1 and M2 share load equally with input as minimum as 94.7 VDC and with load current as minimum as ~1.2A. Therefore, the embodiments herein achieve stable operation of the inverter modules even at minimum input voltage and load current levels, which are typically challenging conditions in existing paralleled inverter systems.
[0045] The embodiments herein disclose methods and systems designed for equally sharing load among at least two paralleled inverters connected to a common DC input. The disclosed methodology dynamically adjusts the output current of each inverter module, ensuring balanced load distribution across the connected inverters. As explained in detail above, the embodiments herein enable measurement of the input DC current drawn by each inverter and adjust them to be equal, thereby ensuring that the output AC current is also evenly shared. This approach simplifies load sharing by balancing the DC input current directly, rather than relying on the more complex method of extracting and controlling the AC output current to achieve equal load distribution.
[0046] The embodiments disclosed herein can be implemented through at least one software program running on at least one hardware device and performing network management functions to control the network elements. The network elements shown in FIG. 1B include blocks which can be at least one of a hardware device, or a combination of hardware device and software module. Therefore, it is understood that the scope of the protection is extended to such a program and in addition to a computer readable means having a message therein, such computer readable storage means contain program code means for implementation of one or more steps of the method, when the program runs on a server or mobile device or any suitable programmable device. The method is implemented in at least one embodiment through or together with a software program written in e.g., Very high speed integrated circuit Hardware Description Language (VHDL) another programming language, or implemented by one or more VHDL or several software modules being executed on at least one hardware device. The hardware device can be any kind of portable device that can be programmed. The device may also include means which could be e.g., hardware means like e.g., an ASIC, or a combination of hardware and software means, e.g., an ASIC and an FPGA, or at least one microprocessor and at least one memory with software modules located therein. The method embodiments described herein could be implemented partly in hardware and partly in software. Alternatively, the invention may be implemented on different hardware devices, e.g., using a plurality of CPUs.
[0047] The foregoing description of the specific embodiments will so fully reveal the general nature of the embodiments herein that others can, by applying current knowledge, readily modify and/or adapt for various applications such specific embodiments without departing from the generic concept, and, therefore, such adaptations and modifications should and are intended to be comprehended within the meaning and range of equivalents of the disclosed embodiments. It is to be understood that the phraseology or terminology employed herein is for the purpose of description and not of limitation. Therefore, while the embodiments herein have been described in terms of embodiments and examples, those skilled in the art will recognize that the embodiments and examples disclosed herein can be practiced with modification within the scope of the embodiments as described herein.
, Claims:STATEMENT OF CLAIMS
We claim:
1. A system (100) for equal load-sharing between at least two paralleled inverter modules, comprising:
a DC input source (101) connected to the at least two paralleled inverter modules (102-1, …, 102-n), wherein each of the at least two paralleled inverter modules comprises:
a load-share controller comprising a share bus;
a DC-DC converter coupled to the load-share controller, wherein the load-share controller is configured to:
monitor an input DC current drawn by the at least two paralleled inverter modules from the DC input source (101);
generate an error signal on detecting that one of the at least two paralleled inverter modules is drawing lower current; and
feed an optically-isolated error signal to a control loop of a DC-DC converter, wherein the optically isolated error signal adjusts an output DC voltage of the inverter module drawing the lower current to equalize the input DC current drawn by each of the at least two paralleled inverter modules, thereby ensuring that an output AC current is evenly shared between the at least two paralleled inverter modules (102-1, …, 102-n).
2. The system (100) as claimed in claim 1, wherein the system (100) comprises a current sensing resistor for measuring an input DC current from the input DC source (101), wherein the input DC current is fed to the DC-DC converter.
3. The system (100) as claimed in claim 1, wherein the system (100) comprises a full-bridge unfolding network to receive a regulated unidirectional sinusoidal DC voltage from the DC-DC converter to generate an AC waveform, wherein the AC waveform is floating with respect to the output of the DC-DC converter and is galvanically isolated from the input DC current.
4. The system (100) as claimed in claim 3, wherein the system (100) comprises a bi-directional switch for connecting an output of each of the at least two paralleled inverter modules to the load.
5. The system (100) as claimed in claim 1, wherein the share bus communicates a signal between the at least two inverter modules (102-1, …, 102-n) based on currents drawn by each of the at least two inverter modules.
6. The system (100) as claimed in claim 1, wherein the system (100) is configured to:
generate a fault detection signal on detecting an abnormal operating condition in any of the at least two paralleled inverter modules (102-1, …, 102-n); and
generate alerts for taking protective actions to isolate a faulty inverter module from the at least two paralleled inverter modules (102-1, …, 102-n).
7. A method for equal load-sharing between at least two paralleled inverter modules, comprising:
monitoring, by a load-share controller of each of the at least two paralleled inverter modules, an input DC current drawn by the at least two paralleled inverter modules (102-1, …, 102-n) from a DC input source (101);
generating, by the load-share controller, an error signal on detecting that one of the at least two paralleled inverter modules (102-1, …, 102-n) is drawing lower current; and
feeding, by the load-share controller, an optically-isolated error signal to a control loop of a DC-DC converter, wherein the optically isolated error signal adjusts an output DC voltage of the inverter module drawing the lower current to equalize the input DC current drawn by each of the at least two paralleled inverter modules, thereby ensuring that an output AC current is evenly shared between the at least two paralleled inverter modules (102-1, …, 102-n).
8. The method as claimed in claim 7, wherein the method comprises measuring an input DC current from a DC input source (101) using a current sensing resistor, wherein the input DC current is fed to the DC-DC converter.
9. The method as claimed in claim 7, wherein the method comprises receiving, by a full-bridge unfolding network, a regulated unidirectional sinusoidal DC voltage from the DC-DC converter to generate an AC waveform, wherein the AC waveform is floating with respect to the output of the DC-DC converter and is galvanically isolated from the input DC current.
10. The method as claimed in claim 9, wherein the method comprises connecting an output of each of the at least two paralleled inverter modules to the load through a bi-directional switch.
11. The method as claimed in claim 7, wherein the method comprises communicating a signal between the at least two paralleled inverter modules using a share bus connected to the load-share controller, based on currents drawn by each of the at least two paralleled inverter modules.
12. The method as claimed in claim 7, wherein the method comprises:
generating a fault detection signal on detecting an abnormal operating condition in any of the at least two paralleled inverter modules ((102-1, …, 102-n); and
generating alerts for taking protective actions to isolate a faulty inverter module from the at least two paralleled inverter modules (102-1, …, 102-n).

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