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METHOD TO ANALYZE CHANNEL STRESS IN GE FINFET ARCHITECTURE AND ARCHITECTURE THEREOF
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METHOD TO ANALYZE CHANNEL STRESS IN GE FINFET ARCHITECTURE AND ARCHITECTURE THEREOF
ORDINARY APPLICATION
Published
Filed on 31 May 2018
Patent Information
| Application ID | 201831020551 |
| Date of Application | 31/05/2018 |
Documents
| Name | Date |
|---|---|
| 201831020551-FER.pdf | 18/10/2021 |
| 201831020551-ABSTRACT [29-09-2021(online)].pdf | 29/09/2021 |
| 201831020551-CLAIMS [29-09-2021(online)].pdf | 29/09/2021 |
| 201831020551-FER_SER_REPLY [29-09-2021(online)].pdf | 29/09/2021 |
| 201831020551-OTHERS [29-09-2021(online)].pdf | 29/09/2021 |
| 201831020551-FORM 18 [09-01-2020(online)].pdf | 09/01/2020 |
| 201831020551-COMPLETE SPECIFICATION [31-05-2018(online)].pdf | 31/05/2018 |
| 201831020551-DECLARATION OF INVENTORSHIP (FORM 5) [31-05-2018(online)].pdf | 31/05/2018 |
| 201831020551-DRAWINGS [31-05-2018(online)].pdf | 31/05/2018 |
| 201831020551-FIGURE OF ABSTRACT [31-05-2018(online)].jpg | 31/05/2018 |
| 201831020551-FORM 1 [31-05-2018(online)].pdf | 31/05/2018 |
| 201831020551-STATEMENT OF UNDERTAKING (FORM 3) [31-05-2018(online)].pdf | 31/05/2018 |
