image
image
user-login
Patent search/

METHOD FOR USING FPGA TO REALIZE 32 BIT ADDRESSING AND ACCESSING OF SV DATA

Patent Search in India

  • tick

    Extensive patent search conducted by a registered patent agent

  • tick

    Patent search done by experts in under 48hrs

₹999

₹399

Talk to expert

METHOD FOR USING FPGA TO REALIZE 32 BIT ADDRESSING AND ACCESSING OF SV DATA

PCT NATIONAL PHASE APPLICATION

Published

date

Filed on 15 June 2015

Patent Information

Application ID1563/MUMNP/2015
Date of Application15/06/2015

Documents

NameDate
1563-MUMNP-2015-IntimationOfGrant28-06-2023.pdf28/06/2023
1563-MUMNP-2015-PatentCertificate28-06-2023.pdf28/06/2023
1563-MUMNP-2015-Response to office action [01-12-2020(online)].pdf01/12/2020
1563-MUMNP-2015-PETITION UNDER RULE 137 [30-11-2020(online)]-1.pdf30/11/2020
1563-MUMNP-2015-PETITION UNDER RULE 137 [30-11-2020(online)]-2.pdf30/11/2020
1563-MUMNP-2015-PETITION UNDER RULE 137 [30-11-2020(online)].pdf30/11/2020
1563-MUMNP-2015-CLAIMS [03-05-2020(online)].pdf03/05/2020
1563-MUMNP-2015-FER_SER_REPLY [03-05-2020(online)].pdf03/05/2020
1563-MUMNP-2015-FER_SER_REPLY [22-04-2020(online)].pdf22/04/2020
1563-MUMNP-2015-FER.pdf23/10/2019
1563-MUMNP-2015.pdf11/08/2018
Abstract drawing.pdf11/08/2018
ABSTRACT1.jpg11/08/2018
Complete Specification.pdf11/08/2018
Drawings.pdf11/08/2018
FORM 3.pdf11/08/2018
FORM 5.pdf11/08/2018
Form-18(Online).pdf11/08/2018
WIPO.pdf11/08/2018
Form 18 [08-11-2016(online)].pdf08/11/2016
earn

Refer a friend