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METHOD FOR REDUCING INTERRUPT LATENCY IN EMBEDDED SYSTEMS

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METHOD FOR REDUCING INTERRUPT LATENCY IN EMBEDDED SYSTEMS

ORDINARY APPLICATION

Published

date

Filed on 19 January 2017

Patent Information

Application ID201741002175
Date of Application19/01/2017

Documents

NameDate
201741002175-IntimationOfGrant02-01-2024.pdf02/01/2024
201741002175-PatentCertificate02-01-2024.pdf02/01/2024
201741002175-CLAIMS [23-11-2020(online)].pdf23/11/2020
201741002175-COMPLETE SPECIFICATION [23-11-2020(online)].pdf23/11/2020
201741002175-CORRESPONDENCE [23-11-2020(online)].pdf23/11/2020
201741002175-DRAWING [23-11-2020(online)].pdf23/11/2020
201741002175-FER_SER_REPLY [23-11-2020(online)].pdf23/11/2020
201741002175-OTHERS [23-11-2020(online)].pdf23/11/2020
201741002175-FORM 3 [22-11-2020(online)].pdf22/11/2020
201741002175-Information under section 8(2) [22-11-2020(online)].pdf22/11/2020
201741002175-FER.pdf21/05/2020
201741002175-FORM 13 [06-08-2019(online)].pdf06/08/2019
201741002175-FORM-26 [05-08-2019(online)].pdf05/08/2019
Correspondence by Agent_Form1-PA_17-04-2017.pdf17/04/2017
Other Patent Document [17-04-2017(online)].pdf17/04/2017
Request For Certified Copy-Online.pdf28/03/2017
REQUEST FOR CERTIFIED COPY [27-03-2017(online)].pdf27/03/2017
Description(Complete) [19-01-2017(online)].pdf19/01/2017
Description(Complete) [19-01-2017(online)].pdf_294.pdf19/01/2017
Drawing [19-01-2017(online)].pdf19/01/2017
Form 18 [19-01-2017(online)].pdf19/01/2017
Form 18 [19-01-2017(online)].pdf_295.pdf19/01/2017
Form 5 [19-01-2017(online)].pdf19/01/2017
Power of Attorney [19-01-2017(online)].pdf19/01/2017
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