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METHOD FOR DESIGNING A VERY LARGE SCALE INTEGRATION (VLSI) CIRCUIT

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METHOD FOR DESIGNING A VERY LARGE SCALE INTEGRATION (VLSI) CIRCUIT

ORDINARY APPLICATION

Published

date

Filed on 21 June 2022

Patent Information

Application ID202241035401
Date of Application21/06/2022

Documents

NameDate
202241035401-FORM-26 [10-07-2022(online)].pdf10/07/2022
202241035401-Proof of Right [10-07-2022(online)].pdf10/07/2022
202241035401-COMPLETE SPECIFICATION [21-06-2022(online)].pdf21/06/2022
202241035401-DECLARATION OF INVENTORSHIP (FORM 5) [21-06-2022(online)].pdf21/06/2022
202241035401-DRAWINGS [21-06-2022(online)].pdf21/06/2022
202241035401-FIGURE OF ABSTRACT [21-06-2022(online)].jpg21/06/2022
202241035401-FORM 1 [21-06-2022(online)].pdf21/06/2022
202241035401-FORM-9 [21-06-2022(online)].pdf21/06/2022
202241035401-REQUEST FOR EARLY PUBLICATION(FORM-9) [21-06-2022(online)].pdf21/06/2022
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