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LOW LATENCY SYNCHRONIZATION SCHEME FOR MESOCHRONOUS DDR SYSTEM
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Abstract
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LOW LATENCY SYNCHRONIZATION SCHEME FOR MESOCHRONOUS DDR SYSTEM
PCT NATIONAL PHASE APPLICATION
Published
Filed on 20 October 2015
Patent Information
| Application ID | 6570/CHENP/2015 |
| Date of Application | 20/10/2015 |
Documents
| Name | Date |
|---|---|
| 6570-CHENP-2015-FER.pdf | 17/10/2021 |
| Form 18 [15-05-2017(online)].pdf | 15/05/2017 |
| 6570-CHENP-2015 ASSIGNMENT 02-02-2016.pdf | 02/02/2016 |
| 6570-CHENP-2015 CORRESPONDENCE-ASSIGNMENT 02-02-2016.pdf | 02/02/2016 |
| abstract-6570-CHENP-2015.jpg | 23/11/2015 |
| 6570-CHENP-2015.pdf | 24/10/2015 |
| Description(Complete) [20-10-2015(online)].pdf | 20/10/2015 |
| Drawing [20-10-2015(online)].pdf | 20/10/2015 |
| Form 1 [20-10-2015(online)].pdf | 20/10/2015 |
| Form 3 [20-10-2015(online)].pdf | 20/10/2015 |
| Form 5 [20-10-2015(online)].pdf | 20/10/2015 |
| Power of Attorney [20-10-2015(online)].pdf | 20/10/2015 |
| Priority Document [20-10-2015(online)].pdf | 20/10/2015 |
