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FAULT TOLERANT ALGORITHM (FTA) FOR FPGA''S BY SHIFTING THE CONFIGURATION DATA TO ENHANCE THE PERFORMANCE AND RELIABILITY
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FAULT TOLERANT ALGORITHM (FTA) FOR FPGA''S BY SHIFTING THE CONFIGURATION DATA TO ENHANCE THE PERFORMANCE AND RELIABILITY
ORDINARY APPLICATION
Published
Filed on 15 July 2021
Patent Information
| Application ID | 202141031842 |
| Date of Application | 15/07/2021 |
Documents
| Name | Date |
|---|---|
| 202141031842-8(i)-Substitution-Change Of Applicant - Form 6 [12-01-2023(online)].pdf | 12/01/2023 |
| 202141031842-ASSIGNMENT DOCUMENTS [12-01-2023(online)].pdf | 12/01/2023 |
| 202141031842-Form13_Address of Applicant Change_28-12-2021.pdf | 28/12/2021 |
| 202141031842-Form13_Address of Service Change_28-12-2021.pdf | 28/12/2021 |
| 202141031842-Form9_Early Publication_28-12-2021.pdf | 28/12/2021 |
| 202141031842-Abstract_As Filed_15-07-2021.pdf | 15/07/2021 |
| 202141031842-Claims_As Filed_15-07-2021.pdf | 15/07/2021 |
| 202141031842-Description Complete_As Filed_15-07-2021.pdf | 15/07/2021 |
| 202141031842-Form1_As Filed_15-07-2021.pdf | 15/07/2021 |
| 202141031842-Form2 Title Page_Complete_15-07-2021.pdf | 15/07/2021 |
| 202141031842-Form3_As Filed_15-07-2021.pdf | 15/07/2021 |
