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Design and implementation of low power and low area RISC core using Vedic mathematics

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Design and implementation of low power and low area RISC core using Vedic mathematics

ORDINARY APPLICATION

Published

date

Filed on 30 June 2023

Patent Information

Application ID202341044121
Date of Application30/06/2023

Documents

NameDate
202341044121-FORM-8 [19-09-2023(online)].pdf19/09/2023
202341044121-EDUCATIONAL INSTITUTION(S) [03-07-2023(online)].pdf03/07/2023
202341044121-FORM-9 [03-07-2023(online)].pdf03/07/2023
202341044121-COMPLETE SPECIFICATION [30-06-2023(online)].pdf30/06/2023
202341044121-DECLARATION OF INVENTORSHIP (FORM 5) [30-06-2023(online)].pdf30/06/2023
202341044121-DRAWINGS [30-06-2023(online)].pdf30/06/2023
202341044121-EDUCATIONAL INSTITUTION(S) [30-06-2023(online)].pdf30/06/2023
202341044121-EVIDENCE FOR REGISTRATION UNDER SSI(FORM-28) [30-06-2023(online)].pdf30/06/2023
202341044121-FORM 1 [30-06-2023(online)].pdf30/06/2023
202341044121-FORM 18 [30-06-2023(online)].pdf30/06/2023
202341044121-FORM FOR SMALL ENTITY(FORM-28) [30-06-2023(online)].pdf30/06/2023
202341044121-POWER OF AUTHORITY [30-06-2023(online)].pdf30/06/2023
202341044121-REQUEST FOR EXAMINATION (FORM-18) [30-06-2023(online)].pdf30/06/2023
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