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CONFIGURATION OF JFET FOR BASE DRIVE BIPOLAR JUNCTION TRANSISTORWITH AUTOMATIC COMPENSATION OF BETA VARIATION

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CONFIGURATION OF JFET FOR BASE DRIVE BIPOLAR JUNCTION TRANSISTORWITH AUTOMATIC COMPENSATION OF BETA VARIATION

ORDINARY APPLICATION

Published

date

Filed on 9 December 2014

Patent Information

Application ID6223/CHE/2014
Date of Application09/12/2014

Documents

NameDate
Form 3 [17-03-2017(online)].pdf17/03/2017
Form 3 [02-12-2016(online)].pdf02/12/2016
6223-CHE-2014-Correspondence-F1-PA-250416.pdf19/07/2016
6223-CHE-2014-Form 1-250416.pdf19/07/2016
6223-CHE-2014-Power of Attorney-250416.pdf19/07/2016
Form 3 [13-07-2016(online)].pdf13/07/2016
Form 3 [13-07-2016(online)].pdf_97.pdf13/07/2016
Form 13 [22-12-2015(online)].pdf22/12/2015
REQUEST FOR CERTIFIED COPY [22-12-2015(online)].pdf22/12/2015
Description(Complete) [09-12-2015(online)].pdf09/12/2015
Drawing [09-12-2015(online)].pdf09/12/2015
OTHERS [09-12-2015(online)].pdf09/12/2015
6223-CHE-2014 CORREESPONDENCE OTHERS 03-03-2015.pdf03/03/2015
6223-CHE-2014 FORM-1 03-03-2015.pdf03/03/2015
6223-CHE-2014 POWER OF ATTORNEY 03-03-2015.pdf03/03/2015
Form 3.pdf11/12/2014
General POA_Form 26_Mahant.pdf11/12/2014
MY203004P_MTHK_Ready for filing(Draft).pdf11/12/2014
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