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A PULSE CLOCK GENERATION LOGIC WITH BUILT IN LEVEL SHIFTER AND PROGRAMMABLE RISING EDGE AND PULSE WIDTH
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Abstract
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Inventors
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Specification
Documents
A PULSE CLOCK GENERATION LOGIC WITH BUILT IN LEVEL SHIFTER AND PROGRAMMABLE RISING EDGE AND PULSE WIDTH
PCT NATIONAL PHASE APPLICATION
Published
Filed on 4 October 2014
Patent Information
| Application ID | 7342/CHENP/2014 |
| Date of Application | 04/10/2014 |
Documents
| Name | Date |
|---|---|
| 7342-CHENP-2014-FER.pdf | 20/02/2020 |
| abstract 7342-CHENP-2014.jpg | 04/04/2015 |
| 7342-CHENP-2014 ASSIGNMENT 31-03-2015.pdf | 31/03/2015 |
| 7342-CHENP-2014 CORRESPONDENCE OTHERS 31-03-2015.pdf | 31/03/2015 |
| 7342-CHENP-2014 FORM-3 31-03-2015.pdf | 31/03/2015 |
| 7342-CHENP-2014.pdf | 01/11/2014 |
| 7342-CHENP-2014 ASSIGNMENT 23-10-2014.pdf | 23/10/2014 |
| 7342-CHENP-2014 CORRESPONDENCE OTHERS 23-10-2014.pdf | 23/10/2014 |
| 7342-CHENP-2014 POWER OF ATTORNEY 23-10-2014.pdf | 23/10/2014 |
| 14282-2179-SPECIFICATION.pdf | 07/10/2014 |
| FORM-3.pdf | 07/10/2014 |
| FORM-5.pdf | 07/10/2014 |
| IB304.pdf | 07/10/2014 |
| QUALCOMM INCORPORATED_March 2014.pdf | 07/10/2014 |
