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A NOVEL VLSI BASED ARCHITECTURE FOR STROKE DETECTION USING OPTIMIZED RESOURCE ALLOCATION

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A NOVEL VLSI BASED ARCHITECTURE FOR STROKE DETECTION USING OPTIMIZED RESOURCE ALLOCATION

ORDINARY APPLICATION

Published

date

Filed on 21 October 2021

Patent Information

Application ID202141047825
Date of Application21/10/2021

Documents

NameDate
202141047825-FER.pdf01/06/2022
202141047825-Abstract_As Filed_21-10-2021.pdf21/10/2021
202141047825-Claims_As Filed_21-10-2021.pdf21/10/2021
202141047825-Description Complete_As Filed_21-10-2021.pdf21/10/2021
202141047825-Drawings_As Filed_21-10-2021.pdf21/10/2021
202141047825-Form18_Examination Request_21-10-2021.pdf21/10/2021
202141047825-Form1_As Filed_21-10-2021.pdf21/10/2021
202141047825-Form2 Title Page_Complete_21-10-2021.pdf21/10/2021
202141047825-Form3_As Filed_21-10-2021.pdf21/10/2021
202141047825-Form5_As Filed_21-10-2021.pdf21/10/2021
202141047825-Form9_Early Publication_21-10-2021.pdf21/10/2021

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